Improving stochastic computing fault-tolerance:A case study on discrete wavelet transform

Sadeghi, Shabnam; Mahani, Ali

doi:10.22055/jaree.2022.38634.1036

Document Type : Research article

Authors

Reliable and Smart Systems Lab (RSS), Shahid Bahonar University of Kerman, Kerman, Iran

https://doi.org/10.22055/jaree.2022.38634.1036

Abstract

Stochastic computing (SC) method is a low-cost alternative to conventional binary computing, which processes digital data in the form of pseudo-random bit-streams and because of its highly redundant encoding format, bit-flip errors have a slight effect on the signal final value. As a result, this computational method is used for fault-tolerant digital applications. In this paper stochastic computing has been chosen to implement 2- dimensional discrete wavelet transform (2-D DWT) as a case study. The performance of this circuit is analyzed through two different faulty experiments. The results show that stochastic 2-D DWT outperforms binary implementation. Although stochastic computing provides inherent fault tolerance, we proposed four structures based on dual modular redundancy to improve the stochastic computing reliability. Improving the reliability of the stochastic circuits with the least area overhead is considered the main objective in these structures. The proposed methods are applied to improve the reliability of stochastic wavelet transform circuits. Experimental results show that all proposed structures improve the reliability of stochastic circuits, especially in extremely noisy conditions where fault tolerance of SC is reduced.

Keywords

Main Subjects

Electronics

References

[1] V. V. Mahesh, and T. K. Shahana, "Design and synthesis of FIR filter banks using area and power efficient Stochastic Computing," in 2020 Fourth World Conference on Smart Trends in Systems, Security and Sustainability (WorldS4), 2020, pp. 662-666.

[2] T.-H. Chen, A. Alaghi, and J. P. Hayes, "Behavior of stochastic circuits under severe error conditions," it-Information Technology, vol. 56, pp. 182-191, 2014.

[3] A. Alaghi, W. T. J. Chan, J. P. Hayes, A. B. Kahng, and J. Li, "Optimizing stochastic circuits for accuracy-energy tradeoffs," in Computer-Aided Design (ICCAD), 2015 IEEE/ACM International Conference, 2015, pp. 178-185.

[4] K. Papachatzopoulos, C. Andriakopoulos, and V. Paliouras, "Novel Noise-Shaping Stochastic-Computing Converters for Digital Filtering," in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5.

[5] T. Li, S. Duan, J. Liu, and L. Wang, "Memristive combinational logic circuits and stochastic computing implementation scheme," Circuit World, 2021.

[6] P. Li, D. J. Lilja, W. Qian, K. Bazargan, and M. D. Riedel, "Computation on Stochastic Bit-streams Digital Image Processing Case Studies," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 3, pp. 449-462, 2014.

[7] A. Alaghi, W. Qian, and J. P. Hayes, "The Promise and Challenge of Stochastic Computing," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 8, pp. 1515-1531, 2018.

[8] R. Seva, P. Metku, K. K. Kim, Y. -B. Kim, and M. Choi, "Approximate stochastic computing (ASC) for image processing applications," in 2016 International SoC Design Conference (ISOCC), 2016, pp. 31-32.

[9] A. Hussein, M. Elmasry, and V. Gaudet, "On the Fault Tolerance of Stochastic Decoders," in 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 2017, pp. 219-223.

[10] J. P. Hayes, "Introduction to stochastic computing and its challenges," in Proceedings of the 52nd Annual Design Automation Conference, 2015, pp. 59.

[11] Y. Liu, S. Liu, Y. Wang, F. Lombardi, and J. Han, "A Survey of Stochastic Computing Neural Networks for Machine Learning Applications," IEEE Transactions on Neural Networks and Learning Systems, vol. 32, no. 7, pp. 2809-2824, 2021.

[12] M. Hasani Sadi, and A. Mahani, "Accelerating Deep Convolutional Neural Network base on stochastic computing," Integration, vol. 76, pp. 113-121, 2021.

[13] M. H. Najafi, and M. E. Salehi, "A fast fault-tolerant architecture for sauvola local image thresholding algorithm using stochastic computing," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, pp. 808-812, 2016.

[14] T. Chen and J. P. Hayes, "Design of Division Circuits for Stochastic Computing," 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016, pp. 116-121

[15] W. Qian, and M. D. Riedel, "The synthesis of robust polynomial arithmetic with stochastic logic," in 2008 45th ACM/IEEE Design Automation Conference, 2008, pp. 648-653.

[16] Y. Liu, and K. K. Parhi, "Computing complex functions using factorization in unipolar stochastic logic," in 2016 International Great Lakes Symposium on VLSI (GLSVLSI), 2016, pp. 109-112.

[17] Ch. Bao, and Sh. Zhang. "Algorithm-based fault tolerance for discrete wavelet transform implemented on GPUs." Journal of Systems Architecture, vol. 108, pp. 101823, 2020.

[18] B.-F. Wu, and C.-F. Lin, "A high-performance and memory-efficient pipeline architecture for the 5/3 and 9/7 discrete wavelet transform of JPEG2000 codec," IEEE Transactions on circuits and systems for video technology, vol. 15, pp. 1615-1628, 2005.

[19] R. Starosolski, "Hybrid Adaptive Lossless Image Compression Based on Discrete Wavelet Transform," Entropy, vol. 22, no. 7, pp. 751, 2020.

[20] S. H. Farghaly, and S. M. Ismail. "Floating-point discrete wavelet transform-based image compression on FPGA," AEU-International Journal of Electronics and Communications, vol. 124, pp. 153363, 2020.

[21] T.-B. Dang, D.-T. Le, M. Kim, and H. Choo, "DWT-PCA Combination for Noise Detection in Wireless Sensor Networks." In Proceedings of the Korea Information Processing Society Conference, 2020, pp. 144-146.

[22] C. Xiong, J. Tian, and J. Liu, "Efficient architectures for two-dimensional discrete wavelet transform using lifting scheme," IEEE transactions on image processing, vol. 16, pp. 607-614, 2007.

[23] S. A. Salehi, and D. D. Dhruba, "Efficient Hardware Implementation of Discrete Wavelet Transform Based on Stochastic Computing," in 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020, pp. 422-427.

[24] A. Alaghi, P. Ting, V. T. Lee, and J. P. Hayes, "Accuracy and Correlation in Stochastic Computing," Gross W., Gaudet V. (eds) Stochastic Computing: Techniques and Applications, pp. 77-102, 2019.

[25] A. D. Darji, S. S. Kushwah, S. N. Merchant, and A. N. Chandorkar, "High-performance hardware architectures for multi-level lifting-based discrete wavelet transform," EURASIP Journal on Image and Video Processing, vol. 2014, pp. 47, 2014.

[26] S. S. Bhairannawar, S. Sarkar, and K. B. Raja, "Implementation of Fingerprint Based Biometric System Using Optimized 5/3 DWT Architecture and Modified CORDIC Based FFT," Circuits, Systems, Signal Process, vol. 37, no. 1, pp. 342–366, 2018.

[27] MR. Lone, "A High Speed Architecture for Lifting-based 2-D Cohen-Daubechies-Feauveau (5, 3) Discrete Wavelet Transform used in JPEG2000". International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems, vol. 24, no. 9, pp. 9-24, 2017.