Electronics
Peyman Vafadoost Sabzevar; Ahmad Hajipour; Hamidreza Tavakoli
Abstract
One of the main challenges in the field of control is the use of a stable controller and its lack of dependence on the system model and dynamics so that the input signal is applied to the system based on the existing needs. One of the areas that need to control and apply the input signal is type 1 diabetes, ...
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One of the main challenges in the field of control is the use of a stable controller and its lack of dependence on the system model and dynamics so that the input signal is applied to the system based on the existing needs. One of the areas that need to control and apply the input signal is type 1 diabetes, where people with this disease need constant and regular insulin injections based on blood glucose concentration. Based on this, in this article, two free model methods called the Q-learning algorithm and PID have been used to determine insulin dose, and the results of insulin dose injection show the results and high performance of the Q-learning algorithm in determining insulin dose. This algorithm is one of the methods based on artificial intelligence that discovers the optimal policy based on trial and error. Finally, the Q-learning algorithm has been investigated in the presence of noise and its stability has been proven to ensure the performance of the controller.
Electronics
Alireza Khoshsaadat; Mohammad Abedini
Abstract
In this paper a new improved diode-based circuit is introduced for output voltage limiting of immittance-based constant current Load Resonant Converters (LRCs). The proposed Diode-based Voltage-Limiter (DVL) is very reliable and simple, and also has minimum number of components. Moreover, limiting values ...
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In this paper a new improved diode-based circuit is introduced for output voltage limiting of immittance-based constant current Load Resonant Converters (LRCs). The proposed Diode-based Voltage-Limiter (DVL) is very reliable and simple, and also has minimum number of components. Moreover, limiting values are flexible and can be varied according to the design requirements. All of the positive characteristics of the LRC operation are preserved in this technique such as Zero Voltage Switching (ZVS) of the inverter switches and Zero Current Switching (ZCS) of the rectifier diodes. A 150W converter with 300kHz switching frequency is considered as a sample prototype. The circuit simulation is presented based on the real model of the semiconductor devices in the OrCAD environments to have maximum accordance with the real conditions. Simulation results demonstrate an accurate clamping ability of the output voltage for overload conditions without any characteristics variation.
Electronics
Daniel Kwegyir; Francis Boafo Effah; Daniel Opoku; Peter Asigri; Yoosi Hayford; Eliezer Owusu Boateng; Kwaku Kessey-Antwi; Nana Maryam Abdul-Bassit Munagah; Kelvin Worlanyo Tamakloe
Abstract
Piezoelectric energy harvesting from air conditioner compressors is a promising technology for generating renewable electricity. This study comprehensively compares the energy harvesting potential derived from mechanical vibrations in compressors across various air conditioner brands, harnessing piezoelectric ...
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Piezoelectric energy harvesting from air conditioner compressors is a promising technology for generating renewable electricity. This study comprehensively compares the energy harvesting potential derived from mechanical vibrations in compressors across various air conditioner brands, harnessing piezoelectric systems. Initially, a data collection system rooted in Internet of Things (IoT) technology is employed to capture vibration signals from different branded air conditioner compressors. The acquired data undergoes pre-processing and is subsequently analyzed in MATLAB Simulink to gauge its energy harvesting potential through a piezoelectric framework. Notably, the maximum voltage harvested demonstrated strong positive correlations with both the compressor vibrational frequency (0.7892) and velocity (0.7855), emphasizing their role in determining available mechanical energy for conversion to electrical power. Furthermore, a moderate positive correlation (0.0659) was observed between the harvested voltage and the compressor's rated power, indicating its influence on energy conversion. An additional positive correlation (0.2839) between temperature and harvested voltage was attributed to the increased electrical conductivity of compressor materials at higher temperatures. Conclusively, the compressor's frequency and velocity emerged as primary determinants of the maximum voltage harnessed, with rated power having a less pronounced yet contributory effect. This research provides valuable insights for optimizing energy harvesting from air conditioner compressors, highlighting the pivotal role of operational parameters.
Electronics
Pegah Paknazar; Maryam Shakiba; Gholamreza Shaloo
Abstract
In this study, the effect of the width of the n- and p-strips and gap between the electrodes on output characteristics of the IBC-SHJ solar cell including short-current current density, open-circuit voltage, fill factor and efficiency was investigated using Silvaco ATHENA and ATLAS simulation software. ...
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In this study, the effect of the width of the n- and p-strips and gap between the electrodes on output characteristics of the IBC-SHJ solar cell including short-current current density, open-circuit voltage, fill factor and efficiency was investigated using Silvaco ATHENA and ATLAS simulation software. In this regard, the efficiency of the IBC-SHJ solar cell was improved by developing the geometry of the back contacts. The values for the short-circuit current density, open-circuit voltage, fill factor and efficiency of the solar cell were analysed using physical phenomena and the distribution of the electric field and electric potential for the aforementioned parameters. The results have shown that the width of the n- and p-strips is one of the most effective parameters for improving the efficiency improvement. Moreover, a maximum efficiency of 23.52% was achieved for IBC-SHJ with improved solar cell parameters, focusing on the elimination of additional ARCs and greater structural periodicity. Thus, a simple structure with no complexity in the fabrication process is proposed. The results show that the best width of the p-strip, n-strip and gap between the electrodes is 400 μm, 80 μm and 30 μm, respectively, to achieve improved efficiency.
Electronics
Mohsen Ghaemmaghami; Shahbaz Reyhani
Abstract
This article presents a tunable fourth-order band-pass filter that is designed using an operational trans-conductance amplifier (OTA), which can be used as an anti-aliasing filter (AAF) in the front-end of an analog-to-digital converter (ADC). It is necessary to use a suitable filter to prevent unwanted ...
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This article presents a tunable fourth-order band-pass filter that is designed using an operational trans-conductance amplifier (OTA), which can be used as an anti-aliasing filter (AAF) in the front-end of an analog-to-digital converter (ADC). It is necessary to use a suitable filter to prevent unwanted signals from entering the ADC. The bandwidth of the AAF should be designed according to the bandwidth of the ADC, therefore, matching these two bandwidths is one of the important challenges when using multi-bandwidth analog to digital converters in digital communication applications. The proposed band-pass filter is designed and simulated in 180 nm CMOS technology. The simulation results show that by changing the two bias voltages of the proposed filter, its bandwidth can be changed according to the frequency range of ADSL, ADSL2, and ADSL2+ communication standards and it effectively attenuates unwanted signals.
Electronics
Zahra Ahangari
Abstract
This paper presents a comprehensive investigation of the electrical properties of a heterojunction tunnel field effect transistor with enhanced electrical tunneling current. The proposed device structure incorporates an extended source region and two parallel channels positioned above and below the source ...
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This paper presents a comprehensive investigation of the electrical properties of a heterojunction tunnel field effect transistor with enhanced electrical tunneling current. The proposed device structure incorporates an extended source region and two parallel channels positioned above and below the source region. This configuration effectively amplifies the tunneling area, leading to a significant improvement in the on-state current. Moreover, the inclusion of an embedded oxide region between the source and drain regions confers the device with a high resistance to short-channel effects. The combination of materials in both the source and channel region results in a staggered band alignment at the tunneling junction. This specific configuration leads to a lower threshold voltage for the initiation of tunneling. The impact of critical design parameters on the device performance has been thoroughly examined. A 2D variation matrix has been developed to compute the threshold voltage and on-state current variation based on the source doping density and gate workfunction, which serve as essential design parameters to optimize the electrical performance of the device. Furthermore, the device has achieved a unity current-ratio frequency of 300 GHz indicating its suitability for high-frequency applications. Additionally, the proposed structure provides an on-state current of 2.24×10-4 (A/µm), an off-state current of 1.24×10-15 (A/µm), an on/off current ratio of 1.81×1011, and a subthreshold swing of 5 (mV/dec). These characteristics make the device viable for energy-efficient, high-speed digital circuits.
Electronics
Shabnam Sadeghi; Ali Mahani
Abstract
The stochastic computing (SC) method is a low-cost alternative to conventional binary computing that processes digital data in the form of pseudo-random bit-streams in which bit-flip errors have a trivial effect on the signal final value because of the highly redundant encoding format of this method. ...
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The stochastic computing (SC) method is a low-cost alternative to conventional binary computing that processes digital data in the form of pseudo-random bit-streams in which bit-flip errors have a trivial effect on the signal final value because of the highly redundant encoding format of this method. As a result, this computational method is used for fault-tolerant digital applications. In this paper, stochastic computing has been chosen to implement 2-dimensional discrete wavelet transform (2-D DWT) as a case study. The performance of the circuit is analyzed through two different faulty experiments. The results show that stochastic 2-D DWT outperforms binary implementation. Although SC provides inherent fault tolerance, we have proposed four structures based on dual modular redundancy to improve SC reliability. Improving the reliability of the stochastic circuits with the least area overhead is considered the main objective in these structures. The proposed methods are applied to improve the reliability of stochastic wavelet transform circuits. Experimental results show that all proposed structures improve the reliability of stochastic circuits, especially in extremely noisy conditions where fault tolerance of SC is reduced.
Electronics
Mohammadreza Ghafari; Abdollah Amirkhani; Elyas Rashno; Shirin Ghanbari
Abstract
This paper is an extension of our previous research on presenting a novel Gaussian Mixture-based (MOG2) Video Coding for CCTVs. The aim of this paper is to optimize the MOG2 algorithm used for foreground-background separation in video streaming. In fact, our previous study showed that traditional video ...
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This paper is an extension of our previous research on presenting a novel Gaussian Mixture-based (MOG2) Video Coding for CCTVs. The aim of this paper is to optimize the MOG2 algorithm used for foreground-background separation in video streaming. In fact, our previous study showed that traditional video encoding with the help of MOG2 has a negative effect on visual quality. Therefore, this study is our main motivation for improving visual quality by combining the previously proposed algorithm and color optimization method to achieve better visual quality. In this regard, we introduce Artificial Intelligence (AI) video encoding using Color Clustering (CC), which is used before the MOG2 process to optimize color and make a less noisy mask. The results of our experiments show that with this method the visual quality is significantly increased, while the latency remains almost the same. Consequently, instead of using morphological transformation which has been used in our past study, CC achieves better results such that PSNR and SSIM values have been shown to rise by approximately 1dB and 1 unit respectively.
Electronics
Ata Ollah Mirzaei; Amir Musa Abazari; Hadi Tavakkoli
Abstract
Nowadays, planar spiral coils are widely used in different applications. Mutual inductance of two adjacent coils, is one of the critical operating principles in near-field wireless power and data transmission systems, significantly impacting their performance. Hence, in this study, the mutual inductance ...
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Nowadays, planar spiral coils are widely used in different applications. Mutual inductance of two adjacent coils, is one of the critical operating principles in near-field wireless power and data transmission systems, significantly impacting their performance. Hence, in this study, the mutual inductance between two similar concentric planar spiral coils is investigated. The effect of main parameters, including the track width, w, and the space between two consecutive turns, s, with a fixed inner and outer diameter of the coils are investigated. The Taguchi method using the L16 array in Minitab environment is used to optimize design parameters. The samples of applied Taguchi, are modeled and simulated via ANSYS Maxwell. The results show that the mutual inductance increases by reducing the two investigated parameters. Based on the Taguchi analysis, it is revealed that the effect of the response for both of the investigated parameters is very close. By applying the main effect analysis the obtained results are verified. This interesting result is important in the design of planar spiral coils while we have fabrication limitations in a real sensor design realization.
Electronics
Hamidreza Ghorbani; Jose Luis Romeral Martinez
Abstract
A new active gate drive for Silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET) is proposed in this paper. The SiC MOSFET as an attractive replacement for insulated gate bipolar transistor (IGBT) has been regarded in many high power density converters. The proposed ...
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A new active gate drive for Silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET) is proposed in this paper. The SiC MOSFET as an attractive replacement for insulated gate bipolar transistor (IGBT) has been regarded in many high power density converters. The proposed driver is based on a feedforward control method. This simple analog gate driver (GD) improves switching transient with minimum undesirable effect on the efficiency. This paper involves the entire switching condition (turn on/off), and the GD is applied to the SiC base technology of MOSFET. To evaluate the performance of the proposed GD, it will be compared with a conventional gate driver. The presented GD is validated by experimental tests. All the evaluations are carried out in a hard switching condition and at high-frequency operation.
Electronics
Mojtaba Arab Nezhad; Ali Mahani
Abstract
Approximate computing is considered a promising way to design high-performance and low-power arithmetic units recently. This paper proposes an energy-efficient logarithmic multiplier for error-tolerant applications. The proposed multiplier uses a novel technique to calculate the powers of two products ...
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Approximate computing is considered a promising way to design high-performance and low-power arithmetic units recently. This paper proposes an energy-efficient logarithmic multiplier for error-tolerant applications. The proposed multiplier uses a novel technique to calculate the powers of two products to reduce critical path complexity. Also, a correction term is provided to improve the multiplier accuracy. Additionally, the use of approximate adders in our design is investigated, and optimal truncation length is obtained through simulations. We evaluated our work both in accuracy and hardware criteria. Experiments on a 16-bit proposed multiplier with approximate adder show that power-delay product (PDP) is significantly reduced by 34.05% compared to the best logarithmic multipliers available in the literature, while the mean relative error distance (MRED) is also decreased by 21.1%. The results of embedding our multiplier in the dequantization step of the JPEG standard show that the image quality is improved in comparison with other logarithmic multipliers. In addition, a subtle drop in image quality compared to utilizing exact multipliers proves the viability of our design.
Electronics
Reza Ghanavati; Yousef Seifi Kavian; Abdolnabi Kosarian
Abstract
The ever-increasing threat of air pollution as a serious health hazard throughout the world requires measuring prior to devising a structured solution. Air quality monitoring systems measure the amount of particulate matter such as particles and hazardous gases in the air. Information is required on ...
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The ever-increasing threat of air pollution as a serious health hazard throughout the world requires measuring prior to devising a structured solution. Air quality monitoring systems measure the amount of particulate matter such as particles and hazardous gases in the air. Information is required on the quality of air monitoring and dust detection system in order to make managerial decisions to improve environmental conditions and prevent and treat diseases caused by dust. The present study aims to develop a simple, highly sensitive, and economical monitoring system for the determination of air particulate. In this paper, we develop a real-time ad hoc wireless airborne particle monitoring system using the IEEE 802.15.4 low power sensor network technology called RTWSM, featuring a low-cost sensor node for mass production. Its dynamic features of high scalability and ad hoc architecture enable the design to provide significantly more useful information under all environments, including indoor or outdoor monitoring applications. The performance of the proposed monitoring sensor system is evaluated in environmental and industrial occupation debates to monitor the PM2.5 particle data. The results confirm that the proposed experimental setup works well for local air pollution monitoring and could be extended to automation industrial applications.
Electronics
Amir Davami; Mohammad Hadi Shahrokh Abadi
Abstract
Surface plasmon resonance (SPR) sensors have been widely considered for their sensitivity, accuracy, and appropriate response speed. This article simulates and analyzes the effects of phosphorene nanotubes (PNTs) layer with various diameters and rolling directions on the structure of SPR biosensor in ...
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Surface plasmon resonance (SPR) sensors have been widely considered for their sensitivity, accuracy, and appropriate response speed. This article simulates and analyzes the effects of phosphorene nanotubes (PNTs) layer with various diameters and rolling directions on the structure of SPR biosensor in the Lumerical software environment. The main structure is based on the structure of Kretschmann and the use of the BK7 prism, a gold (Au) layer, and the end layer of phosphorene nanotubes. The proposed SPR biosensor reflectance curves are obtained, analyzed, and compared for various modes of refractive index n = 1.33 and 1.339, resembling a neutral watery medium and a bacterial medium, respectively. The results show that the minimum reflection is achieved for 30 nm Au at an SPR resonance angle of θ = 71.59° while by adding phosphorene nanotubes, it is observed that at a diameter of 10.08 A and an armchair rolling direction, the configuration on the Au layer becomes favorable. The minimum reflectance of 0.199 is observed for the armchair phosphorene nanotubes (10.08A) layer over 30 nm Au. The combination also provides a sensitivity of 152°/RIU for Δn = 0.009 with a high detection accuracy of 0.079. The results demonstrate that the layer of phosphorene nanotubes has a positive effect on SPR biosensors, and it can be used as a controlling factor in SPR biosensors.
Electronics
Amirreza Solaymanpour; Shahbaz Reyhani
Abstract
The electrocardiogram is affected by various noises and one of the most important of which is 50 Hz power-line noise. On the other hand, it is necessary to use a battery in the portable device and so it requires the use of low power consumption circuits. Therefore, one of the challenges ahead when designing ...
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The electrocardiogram is affected by various noises and one of the most important of which is 50 Hz power-line noise. On the other hand, it is necessary to use a battery in the portable device and so it requires the use of low power consumption circuits. Therefore, one of the challenges ahead when designing this type of device is the use of energy-saving filters with the ability to integrate devices and attenuate unwanted signals properly. This paper presents a low-power tunable sixth-order band-stop filter that does not need the off-chip capacitors. The filter structure is based on operational transconductance amplifiers (OTA) and integrated capacitors. Also, it is possible to change the central attenuation frequency of the proposed filter using bias voltage of the transconductance amplifiers. The proposed band-stop filter is designed and simulated in 180 nm CMOS technology at the transistor level. The simulation results show that the proposed filter can attenuate unwanted signals at 50 Hz by 102 dB while the maximum capacitance used in the filter is 54 pF. The power consumption of the proposed band-stop filter is 13.1 nW at a supply voltage of 1.8 V.
Electronics
Mahdi Taheri; Ali Mahani
Abstract
The mapping of DNA subsequences to a known reference genome, referred to as “short-read mapping”, is essential for next-generation sequencing. Hundreds of millions of short reads need to be aligned to a tremendously long reference sequence, making short-read mapping very time consuming. Day ...
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The mapping of DNA subsequences to a known reference genome, referred to as “short-read mapping”, is essential for next-generation sequencing. Hundreds of millions of short reads need to be aligned to a tremendously long reference sequence, making short-read mapping very time consuming. Day by day progress in Next-Generation Sequencing (NGS) is enabling the generation of DNA sequence data at ever faster rates and at low cost, which means a dramatic increase in the amounts of data being sequenced; nowadays, sequencing nearly 20 billion reads (short DNA fragments) costs about 1000 dollars per human genome and sequencers can generate 6 Terabases of data in less than two days. This article considered the seed extension kernel of the Burrows-Wheeler Alignment (BWA) genomic mapping algorithm for accelerating with FPGA devices. We have proposed an FPGA-based accelerated implementation for the seed extension kernel. The Smith-Waterman algorithm is used during the seed extension to find the optimum alignment between two sequences. The state-of-the-art architectures use 1D-systolic arrays to fill a similarity matrix, based on the best score out of all match combinations, mismatches and gaps are computed. The cells on the same anti-diagonal are calculated in parallel in these architectures. We propose a novel 2-dimensional architecture. Our new modified algorithm is based on two editing and calculating phases. In each step of calculation, some errors may occur in which all the cells on the same row and the same column are computed in parallel and, thereby, significantly speed up the process. Needless to say, these probable errors will be omitted before the next step of calculation begin. Our simulation results show that the proposed architecture can work with up to 312 MHz frequency in Synopsys Design-Compiler for 180-nm CMOS technology and be up to 570x and 1.4x faster than the software execution and the 1D-systolic arrays, respectively.
Electronics
Seyed Ali Sadatnoori
Abstract
The output of a Digital Delta-Sigma Modulator (DDSM) is always a periodic signal and the input is constant. A hybrid DDSM is a premiere to its conventional counterpart for having a potential speed, by the choice of its smaller bus. This paper offers an implementation for multi-stage noise shaping (MASH) ...
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The output of a Digital Delta-Sigma Modulator (DDSM) is always a periodic signal and the input is constant. A hybrid DDSM is a premiere to its conventional counterpart for having a potential speed, by the choice of its smaller bus. This paper offers an implementation for multi-stage noise shaping (MASH) DDSMs that includes four modulators named hybrid DDSM-1, DDSM-2, DDSM-3, and DDSM-4. Also, it introduces a new solution, where the desired ratio in fractional frequency synthesizers is formed by combining four different modulos. The first stage modulator is a programmable modulus EFM1 and has a modulus M1 that is not a power of 2. The second, third, and fourth stage modulators are modified MASH 1-1, multi-modulus MASH 1-1-1, and the efficiently dithered MASH 1-1-1-1 modulator that has conventional modulus M2, M3, and M4, respectively. The M1 modulus is optimally selected to synthesize the new structure of the desired frequencies. Design results confirm the suppositional predictions. In addition, the results of the circuit implementation proposed method offer a 17% reduction in hardware complexity.
Electronics
Mohsen Makvandi; Mohammad Javad Maleki; Mohammad Soroosh
Abstract
In this paper, a photonic crystal structure composed of the silicon rods is proposed for an all-optical 4*2 encoder. Four input ports are connected to two outputs port via the cross-connections. Different radii of rods as defects are placed in the cross-connection region for coupling the optical waves ...
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In this paper, a photonic crystal structure composed of the silicon rods is proposed for an all-optical 4*2 encoder. Four input ports are connected to two outputs port via the cross-connections. Different radii of rods as defects are placed in the cross-connection region for coupling the optical waves from the input waveguides to the desired outputs. The total size of the device is about 133 μm2. Plane-wave expansion and finite difference time domain methods are used to calculate the band diagram and simulation of the optical wave propagation inside the structure, respectively. The maximum rise time of the device for all possible states is just about 205 fs which is less than one in the previous works. No need to a bias port and using the same power at input ports are other advantages of this work. The normalized output power margins for logic 0 and 1 are calculated by 2% and 34%, respectively. The simulation results demonstrate the presented structure is capable of using in optical integrated circuits.
Electronics
Saleh Naghizade; Hamed Saghaei
Abstract
This paper reports a new optical half-adder design using linear defects in a photonic crystal (PhC) structure. The half adder's proper design obviates the need to increase the input signal's intensity for the nonlinear optical Kerr effect's appearance, which leads to the diversion of the incoming light ...
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This paper reports a new optical half-adder design using linear defects in a photonic crystal (PhC) structure. The half adder's proper design obviates the need to increase the input signal's intensity for the nonlinear optical Kerr effect's appearance, which leads to the diversion of the incoming light toward the desired output. The proposed device is composed of silicon rods consisting of four optical waveguides and a defect in a PhC. Two well-known plane wave expansion and finite difference time domain methods are used to study and analyze photonic band structure and light propagation inside the PhC, respectively. The numerical results demonstrate that the ON-OFF contrast ratios are 16 dB for “Sum” and about 14 dB for "Carry". They also reveal that the proposed half-adder has a maximum time delay of 0.8 ps with a total footprint of 158 µm2. Due to very low delay time, high contrast ratio, and small footprint, they are more crucial in modern optoelectronic technologies, so this structure can be used in the next generation of all-optical high-speed central processing units.
Electronics
Rahim Ildarabadi; Zohrah Keramat
Abstract
In this paper, the procedure for the protection of borders-based security fences improved using laser beams. Laser beams can be used to protect the border of large departments, large agencies, large universities, and large companies that have a large yard with several-kilometre erecting walls based on ...
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In this paper, the procedure for the protection of borders-based security fences improved using laser beams. Laser beams can be used to protect the border of large departments, large agencies, large universities, and large companies that have a large yard with several-kilometre erecting walls based on laser optic. But it has problems. To implement this system, it uses invention protocol transmission data. The cost of implementing this system is very low. The older methods of this system have been implemented in Hakim Sabzevery University.
Electronics
Mahdi Taheri; Hamed Zandevakili; Ali Mahani
Abstract
It is crucial to detect potential overlaps between any pair of the input reads and a reference genome in genome sequencing, but it takes an excessive amount of time, especially for ultra-long reads. Even though lots of acceleration designs are proposed for different sequencing methods, several crucial ...
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It is crucial to detect potential overlaps between any pair of the input reads and a reference genome in genome sequencing, but it takes an excessive amount of time, especially for ultra-long reads. Even though lots of acceleration designs are proposed for different sequencing methods, several crucial drawbacks impact these methods. One of these difficulties stems from the difference in read lengths that may take place as input data. In this work, we propose a new Race-logic implementation of the seed extension kernel of the BWA-MEM alignment algorithm. The first proposed method does not need reconfiguration to execute the seed extension kernel for different read lengths. We use MEMRISTORs instead of the conventional, complementary metal-oxide-semiconductor (CMOS), which leads to lower area overhead and power consumption. Also, we benefit from Field-Programmable Nanowire Interconnect Architecture as our matrix output resulting in a flexible output that bypasses the reconfiguration procedure of the system for reads with different lengths. Considering the power, area, and delay efficiency, we gain better results than other state-of-the-art implementations. Consequently, we gain up to 22x speedup compared to the state-of-the-art systolic arrays, 600x speed up considering different seed lengths of the previous state-of-the-art proposed methods, at least 10x improvements in area overhead, and 105x improvements in power.
Electronics
Ebrahim Farahmand; Ali Mahani
Abstract
Wireless sensor networks (WSNs) consist of a large number of sensor nodes that allow users to accurately monitor a remote environment by aggregating the data from the individual nodes. These networks require robust and energy-efficient protocols that are improved reliability and lifetime of WSNs. Clustering ...
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Wireless sensor networks (WSNs) consist of a large number of sensor nodes that allow users to accurately monitor a remote environment by aggregating the data from the individual nodes. These networks require robust and energy-efficient protocols that are improved reliability and lifetime of WSNs. Clustering of sensor nodes is an emerging paradigm for the energy-efficient approach to improve lifetime and the reliability of WSN by reducing energy consumption. In this paper, a new Energy-efficient weighted multi-level Clustering Protocol (EWCP) is proposed. Cluster heads (CHs) are selected based on the allotted weight to each sensor nodes. The weight includes the parameters of sensors such as density, residual energy, and distance to prolong the network's lifetime and increase its efficiency. Also, the cluster members are selected based on their distance to the selected CHs. The lifetime of EWCP is improved significantly to compare with the other protocols. This improvement is attributed to the fact that EWCP is energy-efficient in clustering protocol.
Electronics
Mahdi Taheri; Saeideh Sheikhpour; Mohammad Saeed Ansari; Ali Mahani
Abstract
This paper introduces a high-Speed fault-resistant hardware implementation for the S-box of AES cryptographic algorithm, called HFS-box. A deep pipelining for S-box at the gate level is proposed. In addition, in HFS-box a new Dual Modular Redundancy based (DMR-based) countermeasure is exploited for fault ...
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This paper introduces a high-Speed fault-resistant hardware implementation for the S-box of AES cryptographic algorithm, called HFS-box. A deep pipelining for S-box at the gate level is proposed. In addition, in HFS-box a new Dual Modular Redundancy based (DMR-based) countermeasure is exploited for fault correction purpose. The newly introduced countermeasure is a fault correction scheme based on DMR technique (FC-DMR) combined with a version of the time redundancy technique. In the proposed architecture, when a transient random or malicious fault(s) is detected in each pipeline stage, the error signal corresponding to that stage becomes high. The control unit holds the previous correct value in the output of our proposed DMR voter in the other pipeline stages as soon as it observes the value ‘1’ on the error signal. The previous correct outputs will be kept until the fault effect disappears. The presented low-cost HFS-box provide a high capability of fault resistance against transient faults with any duration by imposing low area overhead compared with similar fault correction strategies, i.e. 137%, and low throughput degradation, i.e. 11.3%, on the original S-box implementation.