Electronics
Shabnam Sadeghi; Ali Mahani
Abstract
The stochastic computing (SC) method is a low-cost alternative to conventional binary computing that processes digital data in the form of pseudo-random bit-streams in which bit-flip errors have a trivial effect on the signal final value because of the highly redundant encoding format of this method. ...
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The stochastic computing (SC) method is a low-cost alternative to conventional binary computing that processes digital data in the form of pseudo-random bit-streams in which bit-flip errors have a trivial effect on the signal final value because of the highly redundant encoding format of this method. As a result, this computational method is used for fault-tolerant digital applications. In this paper, stochastic computing has been chosen to implement 2-dimensional discrete wavelet transform (2-D DWT) as a case study. The performance of the circuit is analyzed through two different faulty experiments. The results show that stochastic 2-D DWT outperforms binary implementation. Although SC provides inherent fault tolerance, we have proposed four structures based on dual modular redundancy to improve SC reliability. Improving the reliability of the stochastic circuits with the least area overhead is considered the main objective in these structures. The proposed methods are applied to improve the reliability of stochastic wavelet transform circuits. Experimental results show that all proposed structures improve the reliability of stochastic circuits, especially in extremely noisy conditions where fault tolerance of SC is reduced.
Electronics
Mahdi Taheri; Ali Mahani
Abstract
The mapping of DNA subsequences to a known reference genome, referred to as “short-read mapping”, is essential for next-generation sequencing. Hundreds of millions of short reads need to be aligned to a tremendously long reference sequence, making short-read mapping very time consuming. Day ...
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The mapping of DNA subsequences to a known reference genome, referred to as “short-read mapping”, is essential for next-generation sequencing. Hundreds of millions of short reads need to be aligned to a tremendously long reference sequence, making short-read mapping very time consuming. Day by day progress in Next-Generation Sequencing (NGS) is enabling the generation of DNA sequence data at ever faster rates and at low cost, which means a dramatic increase in the amounts of data being sequenced; nowadays, sequencing nearly 20 billion reads (short DNA fragments) costs about 1000 dollars per human genome and sequencers can generate 6 Terabases of data in less than two days. This article considered the seed extension kernel of the Burrows-Wheeler Alignment (BWA) genomic mapping algorithm for accelerating with FPGA devices. We have proposed an FPGA-based accelerated implementation for the seed extension kernel. The Smith-Waterman algorithm is used during the seed extension to find the optimum alignment between two sequences. The state-of-the-art architectures use 1D-systolic arrays to fill a similarity matrix, based on the best score out of all match combinations, mismatches and gaps are computed. The cells on the same anti-diagonal are calculated in parallel in these architectures. We propose a novel 2-dimensional architecture. Our new modified algorithm is based on two editing and calculating phases. In each step of calculation, some errors may occur in which all the cells on the same row and the same column are computed in parallel and, thereby, significantly speed up the process. Needless to say, these probable errors will be omitted before the next step of calculation begin. Our simulation results show that the proposed architecture can work with up to 312 MHz frequency in Synopsys Design-Compiler for 180-nm CMOS technology and be up to 570x and 1.4x faster than the software execution and the 1D-systolic arrays, respectively.
Electronics
Mahdi Taheri; Hamed Zandevakili; Ali Mahani
Abstract
It is crucial to detect potential overlaps between any pair of the input reads and a reference genome in genome sequencing, but it takes an excessive amount of time, especially for ultra-long reads. Even though lots of acceleration designs are proposed for different sequencing methods, several crucial ...
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It is crucial to detect potential overlaps between any pair of the input reads and a reference genome in genome sequencing, but it takes an excessive amount of time, especially for ultra-long reads. Even though lots of acceleration designs are proposed for different sequencing methods, several crucial drawbacks impact these methods. One of these difficulties stems from the difference in read lengths that may take place as input data. In this work, we propose a new Race-logic implementation of the seed extension kernel of the BWA-MEM alignment algorithm. The first proposed method does not need reconfiguration to execute the seed extension kernel for different read lengths. We use MEMRISTORs instead of the conventional, complementary metal-oxide-semiconductor (CMOS), which leads to lower area overhead and power consumption. Also, we benefit from Field-Programmable Nanowire Interconnect Architecture as our matrix output resulting in a flexible output that bypasses the reconfiguration procedure of the system for reads with different lengths. Considering the power, area, and delay efficiency, we gain better results than other state-of-the-art implementations. Consequently, we gain up to 22x speedup compared to the state-of-the-art systolic arrays, 600x speed up considering different seed lengths of the previous state-of-the-art proposed methods, at least 10x improvements in area overhead, and 105x improvements in power.
Electronics
Ebrahim Farahmand; Ali Mahani
Abstract
Wireless sensor networks (WSNs) consist of a large number of sensor nodes that allow users to accurately monitor a remote environment by aggregating the data from the individual nodes. These networks require robust and energy-efficient protocols that are improved reliability and lifetime of WSNs. Clustering ...
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Wireless sensor networks (WSNs) consist of a large number of sensor nodes that allow users to accurately monitor a remote environment by aggregating the data from the individual nodes. These networks require robust and energy-efficient protocols that are improved reliability and lifetime of WSNs. Clustering of sensor nodes is an emerging paradigm for the energy-efficient approach to improve lifetime and the reliability of WSN by reducing energy consumption. In this paper, a new Energy-efficient weighted multi-level Clustering Protocol (EWCP) is proposed. Cluster heads (CHs) are selected based on the allotted weight to each sensor nodes. The weight includes the parameters of sensors such as density, residual energy, and distance to prolong the network's lifetime and increase its efficiency. Also, the cluster members are selected based on their distance to the selected CHs. The lifetime of EWCP is improved significantly to compare with the other protocols. This improvement is attributed to the fact that EWCP is energy-efficient in clustering protocol.